1. Field of the Invention
The present invention relates to scanner performance comparison and matching methods and systems using design and defect data. More particularly, this invention relates to a method of matching multiple scanners using design layout and defect inspection data in a production environment to ensure process windows are equalized across various scanners, thereby providing consistency across multiple scanners and platforms in the printability of critical structures in semiconductor devices.
2. Related Art
In a production environment, matching performance among various scanners is important to operate in similar process window to ensure repeated, accurate printability of structures on semiconductor wafers. Conventionally, critical dimension (CD) metrology of such wafers was used to identify process window across multiple tools. CD metrology can be used to measure variations in the lines and/or spaces of structures on the wafers; however, not all problems associated with various patterns on a semiconductor wafer may be addressed in this manner.
For example, standard CD metrology uses limited, fixed sampling sites. As a result, the sampling sites may not be sensitive to subtle variations in the process interaction, across reticle or wafer. Furthermore, the sampling sites may not represent the most critical structures in a given device. Thus, when the CD varies in the areas where the fixed sampling does not cover, an important excursion will be missed. An analysis of important excursions is critical for 45 nm and beyond process development. Because of the limited, fixed site sampling, scanning coverage of defect inspection may be necessary to provide an additional, complementary approach, thereby allowing an accurate assessment of scanner process window consistency.
Generally, a semiconductor manufacturing tool, e.g. an exposure tool or a stepper, performs a set of processing steps on a lot of wafers. To perform these steps, the manufacturing tool communicates with a manufacturing framework or a network of processing modules via an equipment/machine interface. Typically, the equipment/machine interface can form part of an advanced process control (APC) system. The APC system initiates a control script based upon a manufacturing model, which can be a software program that automatically retrieves the data needed to execute a manufacturing process.
Wafers are typically staged through multiple manufacturing tools for multiple processes to generate data relating to the quality of the processed semiconductor devices. Unfortunately, errors occurring during the processing of these wafers, namely process variations, can cause significant inconsistencies in the CDs of features on the processed semiconductor devices. CD variations can cause malfunctioning or even failure of associated devices when in use. Thus, fine tuning the performance of the manufacturing tools is important in obtaining accurate manufacturing data, which in turn can be used to adjust settings of subsequent manufacturing processes to decrease CD variations.